ASM PACIFIC TECHNOLOGY (ASMPT) and EV GROUP (EVG) have agreed to co-develop die-to-wafer hybrid bonding solutions for 3D-IC and heterogeneous integration applications. Die-to-wafer hybrid bonding is a pivotal process for enabling the redesign of system-on-chip (SoC) devices to 3D stacked chips via chiplet technology, combining chips with different process nodes into advanced packaging systems that can power new applications such as 5G, high-performance computing (HPC) and artificial intelligence (AI).

The collaboration seeks to deliver what its partners believe will be the most optimal integral customer solutions for die-to-wafer bonding to the market. The goal of die-to-wafer hybrid bonding is to reduce both the time to market and non-recurring engineering development costs by directly fusing the copper interconnects and dielectric of pre-developed chiplets of different functions to achieve improved device performance, cost and form factor.

The benefits are significant, as system designers will then be able to mix and match chiplets and optimally connect them by using ASMPT's ultra-high precision (0.2µm) die placement, along with EVG's die-to-wafer hybrid bonding and fusion technologies, to achieve comparable or even better performance than SoC methodologies.

The ASMPT and EVG partnership will leverage their core competency centers in Europe and Asia to speed up the development of lead customer programs, with an eventual offering of highly configurable modular systems to suit a full spectrum of integration and process requirements.

The challenge involved in die-to-wafer hybrid bonding is to push the boundaries and confluence of technologies to achieve high throughput and high yields for mass production adoption, by blending ultra-high-precision bonding, 'wafer fabrication' die preparation and handling in a Class 1 environment1, and hybrid and fusion bonding technologies into a fully seamless solution.

To achieve such ultra-precision, highly configurable die-to-wafer bonding capabilities requires well-matched equipment partners from the wafer fab and assembly space to come together to deliver solutions for the next level of package scaling. This is what the ASMPT and EVG partnership aims to achieve.